Minimum implant area-aware gate sizing and placement - researchr publication authors

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Andrew B. Kahng, Hyein Lee. Minimum implant area-aware gate sizing and placement. In Joseph R. Cavallaro, Tong Zhang 0002, Alex K. Jones, Hai Helen Li, editors, Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21 - 23, 2014. pages 57-62, ACM, 2014. [doi]

This author has not been identified. Look up 'Andrew B. Kahng' in GoogleThis author has not been identified. Look up 'Hyein Lee' in Google

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