Andrew B. Kahng, Hyein Lee. Minimum implant area-aware gate sizing and placement. In Joseph R. Cavallaro, Tong Zhang 0002, Alex K. Jones, Hai Helen Li, editors, Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21 - 23, 2014. pages 57-62, ACM, 2014. [doi]
Abstract is missing.