Andrew B. Kahng, Sudhakar Muddu. Improved Effective Capacitance Computations for Use in Logic and Layout Optimization. In 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India. pages 578-583, IEEE Computer Society, 1999. [doi]
@inproceedings{KahngM99,
title = {Improved Effective Capacitance Computations for Use in Logic and Layout Optimization},
author = {Andrew B. Kahng and Sudhakar Muddu},
year = {1999},
doi = {10.1109/ICVD.1999.745217},
url = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1999.745217},
tags = {optimization, layout, logic},
researchr = {https://researchr.org/publication/KahngM99},
cites = {0},
citedby = {0},
pages = {578-583},
booktitle = {12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India},
publisher = {IEEE Computer Society},
}