Word-interleaved cache: an energy efficient data cache architecture

T. Venkata Kalyan, Madhu Mutyam. Word-interleaved cache: an energy efficient data cache architecture. In Vijaykrishnan Narayanan, C. P. Ravikumar, Jörg Henkel, Ali Keshavarzi, Vojin G. Oklobdzija, Barry M. Pangrle, editors, Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008, Bangalore, India, August 11-13, 2008. pages 265-270, ACM, 2008. [doi]

Abstract

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