2 64 Gb Multi-Level Flash Memory With 400 Mbit/sec/pin 1.8 V Toggle Mode Interface

Kazushige Kanda, Noboru Shibata, Toshiki Hisada, Katsuaki Isobe, Manabu Sato, Yui Shimizu, Takahiro Shimizu, Takahiro Sugimoto, Tomohiro Kobayashi, Naoaki Kanagawa, Yasuyuki Kajitani, Takeshi Ogawa, Kiyoaki Iwasa, Masatsugu Kojima, Toshihiro Suzuki, Yuya Suzuki, Shintaro Sakai, Tomofumi Fujimura, Yuko Utsunomiya, Toshifumi Hashimoto, Naoki Kobayashi 0004, Yuuki Matsumoto, Satoshi Inoue, Yoshinao Suzuki, Yasuhiko Honda, Yosuke Kato, Shingo Zaitsu, Hardwell Chibvongodze, Mitsuyuki Watanabe, Hong Ding, Naoki Ookuma, Ryuji Yamashita. 2 64 Gb Multi-Level Flash Memory With 400 Mbit/sec/pin 1.8 V Toggle Mode Interface. J. Solid-State Circuits, 48(1):159-167, 2013. [doi]

@article{KandaSHISSSSKKKOIKSSSFUHKMISHKZCWDOY13,
  title = {2 64 Gb Multi-Level Flash Memory With 400 Mbit/sec/pin 1.8 V Toggle Mode Interface},
  author = {Kazushige Kanda and Noboru Shibata and Toshiki Hisada and Katsuaki Isobe and Manabu Sato and Yui Shimizu and Takahiro Shimizu and Takahiro Sugimoto and Tomohiro Kobayashi and Naoaki Kanagawa and Yasuyuki Kajitani and Takeshi Ogawa and Kiyoaki Iwasa and Masatsugu Kojima and Toshihiro Suzuki and Yuya Suzuki and Shintaro Sakai and Tomofumi Fujimura and Yuko Utsunomiya and Toshifumi Hashimoto and Naoki Kobayashi 0004 and Yuuki Matsumoto and Satoshi Inoue and Yoshinao Suzuki and Yasuhiko Honda and Yosuke Kato and Shingo Zaitsu and Hardwell Chibvongodze and Mitsuyuki Watanabe and Hong Ding and Naoki Ookuma and Ryuji Yamashita},
  year = {2013},
  doi = {10.1109/JSSC.2012.2215094},
  url = {http://dx.doi.org/10.1109/JSSC.2012.2215094},
  researchr = {https://researchr.org/publication/KandaSHISSSSKKKOIKSSSFUHKMISHKZCWDOY13},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {48},
  number = {1},
  pages = {159-167},
}