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Min-Sheng Kao, Jen-Ming Wu, Chih-Hsing Lin, Fanta Chen, Ching-Te Chiu, Shawn S. H. Hsu. A 10-Gb/s CML I/O Circuit for Backplane Interconnection in 0.18- /mu m CMOS Technology. IEEE Trans. VLSI Syst., 17(5):688-696, 2009. [doi]
Abstract is missing.