A Formal Verification Method of Scheduling in High-level Synthesis

Chandan Karfa, Chittaranjan A. Mandal, Dipankar Sarkar, S. R. Pentakota, Chris Reade. A Formal Verification Method of Scheduling in High-level Synthesis. In 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA. pages 71-78, IEEE Computer Society, 2006. [doi]

Abstract

Abstract is missing.