Kazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine. Two phase clocked subthreshold adiabatic logic circuit. IEICE Electronic Express, 12(20):20150695, 2015. [doi]
@article{KatoTS15,
title = {Two phase clocked subthreshold adiabatic logic circuit},
author = {Kazunari Kato and Yasuhiro Takahashi and Toshikazu Sekine},
year = {2015},
url = {https://www.jstage.jst.go.jp/article/elex/12/20/12_12.20150695/_article},
researchr = {https://researchr.org/publication/KatoTS15},
cites = {0},
citedby = {0},
journal = {IEICE Electronic Express},
volume = {12},
number = {20},
pages = {20150695},
}