A yield and speed enhancement scheme under within-die variations on 90nm LUT array - researchr publication authors

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Kazuya Katsuki, Manabu Kotani, Kazutoshi Kobayashi, Hidetoshi Onodera. A yield and speed enhancement scheme under within-die variations on 90nm LUT array. In Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005. pages 601-604, IEEE, 2005. [doi]

This author has not been identified. Look up 'Kazuya Katsuki' in GoogleThis author has not been identified. Look up 'Manabu Kotani' in GoogleThis author has not been identified. Look up 'Kazutoshi Kobayashi' in GoogleThis author has not been identified. Look up 'Hidetoshi Onodera' in Google

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