Kazuya Katsuki, Manabu Kotani, Kazutoshi Kobayashi, Hidetoshi Onodera. A yield and speed enhancement scheme under within-die variations on 90nm LUT array. In Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005. pages 601-604, IEEE, 2005. [doi]
Abstract is missing.