A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS ICs

Ming-Dou Ker, Hun-Hsien Chang, Chung-Yu Wu. A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS ICs. J. Solid-State Circuits, 32(1):38-51, 1997. [doi]

Abstract

Abstract is missing.