Layout design and verification for cell library to improve ESD/latchup reliability in deep-submicron CMOS technology

Ming-Dou Ker, Jeng-Jie Peng. Layout design and verification for cell library to improve ESD/latchup reliability in deep-submicron CMOS technology. In Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, CICC 1998, Santa Clara, CA, USA, May 11-14, 1998. pages 537-540, IEEE, 1998. [doi]

Abstract

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