An Evaluation on the Accuracy of the Minimum-Width Transistor Area Models in Ranking the Layout Area of FPGA Architectures

Farheen Fatima Khan, Andy Ye. An Evaluation on the Accuracy of the Minimum-Width Transistor Area Models in Ranking the Layout Area of FPGA Architectures. TRETS, 11(1), 2018. [doi]

Abstract

Abstract is missing.