Sudhanshu Khanna, Steven Bartling, Michael Clinton, Scott R. Summerfelt, John A. Rodriguez, Hugh P. McAdams. An FRAM-Based Nonvolatile Logic MCU SoC Exhibiting 100% Digital State Retention at ${\rm VDD}=$ 0 V Achieving Zero Leakage With ${<}$ 400-ns Wakeup Time for ULP Applications. J. Solid-State Circuits, 49(1):95-106, 2014. [doi]
@article{KhannaBCSRM14,
title = {An FRAM-Based Nonvolatile Logic MCU SoC Exhibiting 100% Digital State Retention at ${\rm VDD}=$ 0 V Achieving Zero Leakage With ${<}$ 400-ns Wakeup Time for ULP Applications},
author = {Sudhanshu Khanna and Steven Bartling and Michael Clinton and Scott R. Summerfelt and John A. Rodriguez and Hugh P. McAdams},
year = {2014},
doi = {10.1109/JSSC.2013.2284367},
url = {http://dx.doi.org/10.1109/JSSC.2013.2284367},
researchr = {https://researchr.org/publication/KhannaBCSRM14},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {49},
number = {1},
pages = {95-106},
}