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An FRAM-Based Nonvolatile Logic MCU SoC Exhibiting 100% Digital State Retention at ${\rm VDD}=$ 0 V Achieving Zero Leakage With ${<}$ 400-ns Wakeup Time for ULP Applications

Sudhanshu Khanna, Steven Bartling, Michael Clinton, Scott R. Summerfelt, John A. Rodriguez, Hugh P. McAdams. An FRAM-Based Nonvolatile Logic MCU SoC Exhibiting 100% Digital State Retention at ${\rm VDD}=$ 0 V Achieving Zero Leakage With ${<}$ 400-ns Wakeup Time for ULP Applications. J. Solid-State Circuits, 49(1):95-106, 2014. [doi]

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