Determination of the stress level for voltage screen of integrated circuits

R. M. Kho, A. J. Moonen, V. M. Girault, Jaap Bisschop, E. H. T. Olthof, S. Nath, Z. N. Liang. Determination of the stress level for voltage screen of integrated circuits. Microelectronics Reliability, 50(9-11):1210-1214, 2010. [doi]

Abstract

Abstract is missing.