Sebastian Kiesel, Thomas Kern, Bernhard Wicht, Helmut Graeb. A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application. In International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Hsinchu, Taiwan, April 22-25, 2019. pages 1-4, IEEE, 2019. [doi]
@inproceedings{KieselKWG19,
title = {A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application},
author = {Sebastian Kiesel and Thomas Kern and Bernhard Wicht and Helmut Graeb},
year = {2019},
doi = {10.1109/VLSI-DAT.2019.8741536},
url = {https://doi.org/10.1109/VLSI-DAT.2019.8741536},
researchr = {https://researchr.org/publication/KieselKWG19},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Hsinchu, Taiwan, April 22-25, 2019},
publisher = {IEEE},
isbn = {978-1-7281-0655-7},
}