Table of Contents

• 10-Bit SAR ADC With Novel Pseudo-Random Capacitor Switching SchemePai-Hsiang Hsu, Yueh-Ru Lee, Chung-Chih Hung. 1-4 [doi]
• Progress in Neuromorphic Computing : Drawing Inspiration from Nature for Gains in AI and ComputingMike Davies. 1 [doi]
• A Current-Mode Differential Sensing CMOS Imager for Optical Linear EncoderYou-Shin Chen, Tzu-Hsiang Hsu, Chien-Wen Chen, Chih-Cheng Hsieh. 1-2 [doi]
• Clocking for HPC Design: Challenges and Experience SharingYih-Chih Chou, Chien-Cheng Wu, Cheng-Hong Tsai. 1-2 [doi]
• A Reliable, Low-Cost, Low-Energy Physically Unclonable Function Circuit Through Effective FilteringShih-Lien Lu, Cheng-En Lee, Peter Noel, Saman Adham, Ted Wong, Jonathan Chang. 1-4 [doi]
• Primitive Concept Identification In A Given Set Of Wafer MapsAhmed Wahba, Chuanhe Jay Shan, Li-C. Wang, Nik Sumikawa. 1-4 [doi]
• ATPG and Test Compression for Probabilistic CircuitsKai-Chieh Yang, Ming-Ting Lee, Chen-Hung Wu, James Chien-Mo Li. 1-4 [doi]
• A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive ApplicationSebastian Kiesel, Thomas Kern, Bernhard Wicht, Helmut Graeb. 1-4 [doi]
• A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption AlgorithmsDominik Sisejkovic, Farhad Merchant, Rainer Leupers, Gerd Ascheid, Volker Kiefer. 1-4 [doi]
• Research Status of Silicon Photonic Integration in Taiwan's AcademiaSan-Liang Lee. 1 [doi]
• A Lightweight 1.16 pJ/bit Processor for the Authenticated Encryption Scheme KetjeSRYun-Wen Lu, Antoon Purnal, Simon Vandenhende, Chen-Yi Lee, Ingrid Verbauwhede, Hsie-Chia Chang. 1-4 [doi]
• CRISP: Center for Research on Intelligent Storage and Processing-in-MemoryYuan Xie. 1 [doi]
• Machine Learning Applications and Opportunities in IC Design FlowLaura Wang, Matt Luo. 1-3 [doi]
• Process Design Kit and Design Automation for Flexible Hybrid ElectronicsTsung-Ching Huang, Ting Lei, Leilai Shao, Sridhar Sivapurapu, Madhavan Swaminathan, Sicheng Li, Zhenan Bao, Kwang-Ting Cheng, Raymond G. Beausoleil. 1-2 [doi]
• A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-Threshold SRAMsLih-Yih Chiou, Chi-Ray Huang, Chang-Chieh Cheng, Jing-Yu Huang, Wei-Suo Ling. 1-4 [doi]
• Embedded Memories for Silicon-In-Package: Optimization of Memory Subsystem from IoT to Machine LearningFatih Hamzaoglu. 1 [doi]
• Design of an Adaptive and Reliable Network on Chip Router Architecture Using FPGAKhyamling Parane, Prabhu B. M. Prasad, Basavaraj Talawar. 1-4 [doi]
• Evolution and Advances of the Nonvolatile Memories and ApplicationsYan Li. 1 [doi]
• EUVL Optics: Status and Future PerspectivesWinfried Kaiser. 1 [doi]
• An Analog Front-End Circuit for CO2 Sensor Readout in 0.18-µm CMOS ProcessDeng-Kai Lin, Chih-Chan Tu, Shih-Kai Kuo, Tsung-Hsien Lin. 1-4 [doi]
• NNSim: A Fast and Accurate SystemC/TLM Simulator for Deep Convolutional Neural Network AcceleratorsYi-Che Lee, Ting-Shuo Hsu, Chun-Tse Chen, Jing-Jia Liou, Juin-Ming Lu. 1-4 [doi]
• A 50 Gb/s Adaptive ADFE with SNR Based Power Management for 2-PAM SystemsChee-Kit Ng, Yu-Chun Lin, Shyh-Jye Jou. 1-4 [doi]
• Flexible Circuits and Systems for Smart Biomedical ApplicationsYongpan Liu. 1 [doi]
• Efficient Write Scheme for Algorithm-Based Multi-Ported MemoryBo-Ya Chen, Bo-En Cher, Bo-Cheng Lai. 1-4 [doi]
• Reactant Minimization for Multi-Target Sample Preparation on Digital Microfluidic Biochips Using Network Flow ModelsKang-Yi Fan, Shigeru Yamashita, Juinn-Dar Huang. 1-4 [doi]
• TSRI Silicon Photonics Design Platform: Standardization and CollaborationMing-Wei Lin. 1 [doi]
• Ultraflexible Amplification Circuits for Imperceptible Brain Monitoring SystemTakafumi Uemura. 1 [doi]
• A perspective on NVRAM technology for future computing systemKatsuhiko Hoya, Kosuke Hatsuda, Kenji Tsuchida, Yohji Watanabe, Yusuke Shirota, Tatsunori Kanai. 1-2 [doi]
• R&D Activities for Capacity Enhancement Using 5G Ultra High-Density Distributed Antenna SystemsTakashi Dateki. 1 [doi]
• Embedded Memory: The Future of Emerging MemoriesFeng-Min Lee. 1 [doi]
• Silicon Technologies for Next Generation 5G Architectures and ApplicationsShankaran Janardhanan. 1 [doi]
• High-Throughput 64K-point FFT Processor for THz Imaging Radar SystemChia-Kai Chan, Hong-Ke Lin, Chih-Wei Liu. 1-4 [doi]
• Using a Complete Flow for Photonic Integrated Circuits to Improve Product Development TimeTom Walker. 1 [doi]
• Failure Root Cause Analysis Automation on Functional Simulation RegressionsChia-Chih Jack Yen. 1 [doi]
• Journey to 5GLi-Fung Chang. 1 [doi]
• Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICsYu-Zhe Wang, Jingjie Wu, Shi-Hao Chen, Mango Chia-Tso Chao, Chia-Hsiang Yang. 1-4 [doi]
• Scalable AI Computing LifecycleJianxiong Yin. 1 [doi]
• Autonomous Driving Technologies and Computing PlatformPeter Hsieh. 1 [doi]
• Development and Evaluation of Low-SHF-Band C-RAN Massive MIMO System for 5GYasushi Maruta. 1 [doi]
• A 39 GHz Reflection-Type Phase Shifter for Reflectarray Antenna ApplicationYu-Ting Lin, Chiao-Yun Hsiao, Pei-Ling Chi, Chien-Nan Kuo. 1-3 [doi]
• Silicon Process Impact on 5G NR mmWave Front End Design and PerformanceChuan-Cheng Cheng, Jeremy Dunworth, Sriram Kalpat, Haitao Cheng, Gang Liu, Ming-Ta Yang, Wing Sy, Joseph Wang, Kamal Sahota, Chidi Chidambaram. 1-2 [doi]
• Cases for Analog Mixed Signal Computing Integrated Circuits for Deep Neural NetworksMingoo Seok, Minhao Yang, Zhewei Jiang, Aurel A. Lazar, Jae-sun Seo. 1-2 [doi]
• A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS TechnologyYuan-Hsi Chou, Shih-Lien Lu. 1-4 [doi]
• R&D Activities for 5G Radio Access Technologies Using SHF Bands and Co-Creation of New Services Using 5GYukihiko Okumura. 1 [doi]
• User- Friendly Compact Model of Magnetic Tunnel Junctions for Circuit Simulation Based on Switching ProbabilityHaoyan Liu, Takashi Ohsawa. 1-4 [doi]
• Beyond Digital Neuromorphic Hardware: Time-Based and Flash-Based DesignsHyung-il Kim. 1 [doi]
• A 9mW 6-9GHz 2.5Gb/s Proximity Transmitter with Combined OOK/BPSK Modulation for Low Power Mobile ConnectivityYuguang Liu, Haixin Song, Kunnong Zeng, Woogeun Rhee, Zhihua Wang. 1-4 [doi]
• ONNC-Based Software Development Platform for Configurable NVDLA DesignsWei-Fen Lin, Cheng-Tao Hsieh, Cheng-Yi Chou. 1-2 [doi]
• A Light Energy Harvesting Single-Inductor Dual-Input Dual-Output Converter for WSNPeng-Chang Huang, Tai-Haur Kuo. 1-4 [doi]
• Reversible Scan Based Diagnostic PatternsYu Huang, Szczepan Urban, Wu-Tung Cheng, Manish Sharma, Fengju Niu, Junna Zhong, Wen-Lung Hsu. 1-4 [doi]
• Energy Efficient CNN Inference Accelerator Using Fast Fourier TransformYa-Chin Chung, Po-Hsiang Cheng, Chih-Wei Liu. 1-4 [doi]
• A Power-Efficient, Bi-Directional Readout Interface Circuit for Cyclic-Voltammetry Electrochemical SensorsYi-Chia Chen, Shao-Yung Lu, Jui-Hsiang Tsai, Yu-Te Liao. 1-3 [doi]
• TEMPO: Thermal-Efficient Management of Power in High-Throughput Network SwitchesTom Munk, Hillel Kugler, Ofir Maori, Adam Teman. 1-4 [doi]
• Heterogeneous Computing for Edge AIPei-Kuei Tsung, Tung-Chien Chen, Chien-Hung Lin, Chih-Yu Chang, Jih-Ming Hsu. 1-2 [doi]
• A CMOS 0.85-V 15.8-nW Current and Voltage Reference without ResistorsJing Wang, Hirofumi Shinohara. 1-4 [doi]
• Efficient Dynamic Fixed-Point Quantization of CNN Inference Accelerators for Edge DevicesYueh-Chi Wu, Chih-Tsun Huang. 1-4 [doi]
• New Memory Technology, Design and Architecture Co-Optimization to Enable Future System NeedsArnaud Furnemont. 1 [doi]
• Supervised-Learning Congestion Predictor For Routability-Driven Global RoutingZhonghua Zhou, Sunmeet Chahal, Tsung-Yi Ho, André Ivanov. 1-4 [doi]
• High-Performance NoC Simulation Acceleration Framework Employing the Xilinx DSP48E1 BlocksPrabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar. 1-4 [doi]
• Future of Computing and Sensing Systems for Embedded ApplicationsThomas Ernst. 1 [doi]
• Customization of a Deep Learning AcceleratorShien-Chun Luo. 1-2 [doi]
• Design and Analysis of Data-Pattern-Insensitive Phase-Tracking Receivers with Fully-Balanced FSK ModulationYining Zhang, Jiahao Zhao, Woogeun Rhee, Zhihua Wang. 1-4 [doi]
• Slow-Down in Power Scaling and the End of Moore's Law?Ghavam Shahidi. 1 [doi]
• A Novel Test Generation Method for Small-Delay Defects with User-Defined Fault ModelChao-Jun Shang, Cheng-Hung Wu, Kuen-Jong Lee, Yu-Hsiang Chen. 1-4 [doi]
• EcoSim: A Smartphone-Based Sensor-Node Emulator with Native Sensors and Protocol StackChung-Yi Kao, Cheng-Ting Lee, Yu-Hung Yeh, Jui-Feng Sung, Pai H. Chou. 1-4 [doi]
• Semiconductor for 5GYujun Li. 1 [doi]
• BlueBox: A Complete Recorder for Code-Blue Events in HospitalsHsinchung Chen, Subramanian Meenakshi, Ali HeydatiGorji, Seyede Mahya Safavi, Pai H. Chou, Cheng-Ting Lee, Ruey-Kang Chang. 1-4 [doi]
• A 15-bit 20 MS/s SHA-Less Pipelined ADC Achieving 73.7 dB SNDR with Averaging Correlated Level Shifting TechniqueJia-Ching Wang, Tsung-Chih Hung, Tai-Haur Kuo. 1-3 [doi]
• Event-Driven Model for High Speed End-to-End Simulations of Transmission System with Non-Linear Optical Elements and Cascaded Clock-and-Data Recovery CircuitsJun Matsui, Hisakatsu Yamaguchi. 1-4 [doi]