Yu Kikuchi, Makoto Takahashi, Tomohisa Maeda, Hiroyuki Hara, Hideho Arakida, Hideaki Yamamoto, Yousuke Hagiwara, Tetsuya Fujita, Manabu Watanabe, Takayoshi Shimazawa, Yasuo Ohara, Takashi Miyamori, Mototsugu Hamada, Yukihito Oowaki. A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm. In IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010. pages 326-327, IEEE, 2010. [doi]
@inproceedings{KikuchiTMHAYHFWSOMHO10,
title = {A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm},
author = {Yu Kikuchi and Makoto Takahashi and Tomohisa Maeda and Hiroyuki Hara and Hideho Arakida and Hideaki Yamamoto and Yousuke Hagiwara and Tetsuya Fujita and Manabu Watanabe and Takayoshi Shimazawa and Yasuo Ohara and Takashi Miyamori and Mototsugu Hamada and Yukihito Oowaki},
year = {2010},
doi = {10.1109/ISSCC.2010.5433906},
url = {http://dx.doi.org/10.1109/ISSCC.2010.5433906},
researchr = {https://researchr.org/publication/KikuchiTMHAYHFWSOMHO10},
cites = {0},
citedby = {0},
pages = {326-327},
booktitle = {IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010},
publisher = {IEEE},
isbn = {978-1-4244-6033-5},
}