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Duckhwan Kim, Saibal Mukhopadhyay. Partitioning Methods for Interface Circuit of Heterogeneous 3-D-ICs Under Process Variation. IEEE Trans. VLSI Syst., 24(5):1626-1635, 2016. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: An Efficient Method of Partitioning Circuits for Multiple-FPGA Implementation.Nam Sung Woo, Jaeseok Kim. dac 1993: 202-207 [doi] Delay Modeling and Statistical Design of Pipelined Circuit Under Process VariationAnimesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Kaushik Roy. tcad, 25(11):2427-2436, 2006. [doi] Temporal Query Processing Using Spatially-Partitioned MethodDuk-Ho Chang, Jong Soo Kim, Myoung-Ho Kim. codas 1996: 436-439
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