The following publications are possibly variants of this publication:
- Rate-0.96 LDPC Decoding VLSI for Soft-Decision Error Correction of NAND Flash MemoryJonghong Kim, Wonyong Sung. tvlsi, 22(5):1004-1015, 2014. [doi]
- Soft-Decision Error Correction of NAND Flash Memory with a Turbo Product CodeJunhee Cho, Wonyong Sung. vlsisp, 70(2):235-247, 2013. [doi]
- Estimation of NAND Flash Memory Threshold Voltage Distribution for Optimum Soft-Decision Error CorrectionDong-hwan Lee, Wonyong Sung. tsp, 61(2):440-449, 2013. [doi]
- Low-Power High-Throughput BCH Error Correction VLSI Design for Multi-Level Cell NAND Flash MemoriesWei Liu, Junrye Rho, Wonyong Sung. sips 2006: 303-308 [doi]