Design and Implementation of Priority Queuing Mechanism on FPGA Using Concurrent Periodic EFSMs and Parametric Model Checking - researchr publication authors

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Tomoya Kitani, Yoshifumi Takamoto, Isao Naka, Keiichi Yasumoto, Akio Nakata, Teruo Higashino. Design and Implementation of Priority Queuing Mechanism on FPGA Using Concurrent Periodic EFSMs and Parametric Model Checking. In Peter Y. K. Cheung, George A. Constantinides, José T. de Sousa, editors, Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings. Volume 2778 of Lecture Notes in Computer Science, pages 1145-1148, Springer, 2003. [doi]

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Tomoya Kitani

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Keiichi Yasumoto

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