Planning Massive Interconnects in 3-D Chips

Johann Knechtel, Evangeline F. Y. Young, Jens Lienig. Planning Massive Interconnects in 3-D Chips. IEEE Trans. on CAD of Integrated Circuits and Systems, 34(11):1808-1821, 2015. [doi]

Authors

Johann Knechtel

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Evangeline F. Y. Young

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Jens Lienig

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