Johann Knechtel, Evangeline F. Y. Young, Jens Lienig. Planning Massive Interconnects in 3-D Chips. IEEE Trans. on CAD of Integrated Circuits and Systems, 34(11):1808-1821, 2015. [doi]
@article{KnechtelYL15,
title = {Planning Massive Interconnects in 3-D Chips},
author = {Johann Knechtel and Evangeline F. Y. Young and Jens Lienig},
year = {2015},
doi = {10.1109/TCAD.2015.2432141},
url = {http://dx.doi.org/10.1109/TCAD.2015.2432141},
researchr = {https://researchr.org/publication/KnechtelYL15},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {34},
number = {11},
pages = {1808-1821},
}