Kenji Kogo, Takayasu Norimatsu, Norihiro Kohmu, Takashi Kawamoto. Design procedure of 25.8 Gbps/lane re-timer IC regarding power integrity. IEICE Electronic Express, 14(23):20171017, 2017. [doi]
@article{KogoNKK17,
title = {Design procedure of 25.8 Gbps/lane re-timer IC regarding power integrity},
author = {Kenji Kogo and Takayasu Norimatsu and Norihiro Kohmu and Takashi Kawamoto},
year = {2017},
doi = {10.1587/elex.14.20171017},
url = {https://doi.org/10.1587/elex.14.20171017},
researchr = {https://researchr.org/publication/KogoNKK17},
cites = {0},
citedby = {0},
journal = {IEICE Electronic Express},
volume = {14},
number = {23},
pages = {20171017},
}