Fast, Layout-Aware Validation of Test-Vectors for Nanometer-Related Timing Failures

Aman Kokrady, C. P. Ravikumar. Fast, Layout-Aware Validation of Test-Vectors for Nanometer-Related Timing Failures. In 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India. pages 597, IEEE Computer Society, 2004. [doi]

@inproceedings{KokradyR04,
  title = {Fast, Layout-Aware Validation of Test-Vectors for Nanometer-Related Timing Failures},
  author = {Aman Kokrady and C. P. Ravikumar},
  year = {2004},
  url = {http://csdl.computer.org/comp/proceedings/vlsid/2004/2072/00/20720597abs.htm},
  tags = {layout, testing, C++, context-aware},
  researchr = {https://researchr.org/publication/KokradyR04},
  cites = {0},
  citedby = {0},
  pages = {597},
  booktitle = {17th  International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2072-3},
}