An inter-layer interconnect BIST solution for monolithic 3D ICs

Abhishek Koneru, Krishnendu Chakrabarty. An inter-layer interconnect BIST solution for monolithic 3D ICs. In 36th IEEE VLSI Test Symposium, VTS 2018, San Francisco, CA, USA, April 22-25, 2018. pages 1-6, IEEE Computer Society, 2018. [doi]

Abstract

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