The following publications are possibly variants of this publication:
- An Interlayer Interconnect BIST and Diagnosis Solution for Monolithic 3-D ICsAbhishek Koneru, Krishnendu Chakrabarty. tcad, 39(10):3056-3066, 2020. [doi]
- Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICsArjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty, Sung Kyu Lim. ets 2019: 1-6 [doi]
- Design Automation and Test Solutions for Monolithic 3D ICsLingjun Zhu, Arjun Chaudhuri, Sanmitra Banerjee, Gauthaman Murali, Pruek Vanna-Iampikul, Krishnendu Chakrabarty, Sung Kyu Lim. jetc, 18(1), 2022. [doi]
- RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICsHeechun Park, Kyungwook Chang, Bon Woong Ku, Jinwoo Kim, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Saibal Mukhopadhyay, Krishnendu Chakrabarty, Sung Kyu Lim. dac 2019: 101 [doi]
- Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICsArjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Heechun Park, Bon Woong Ku, Sukeshwar Kannan, Krishnendu Chakrabarty, Sung Kyu Lim. jetc, 18(1), 2022. [doi]
- Design automation and testing of monolithic 3D ICs: Opportunities, challenges, and solutions: (Invited paper)Kyungwook Chang, Abhishek Koneru, Krishnendu Chakrabarty, Sung Kyu Lim. iccad 2017: 805-810 [doi]