The following publications are possibly variants of this publication:
- A behavioral synthesis method for asynchronous circuits with bundled-data implementation (Tool paper)Naohiro Hamada, Yuuki Shiga, Hiroshi Saito, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya. acsd 2008: 50-55 [doi]
- Integration of behavioral synthesis and floorplanning for asynchronous circuits with bundled-data implementationNaohiro Hamada, Hiroshi Saito. glvlsi 2011: 157-162 [doi]
- A floorplan method for asynchronous circuits with bundled-data implementation on FPGAsHiroshi Saito, Naohiro Hamada, Tomohiro Yoneda, Takashi Nanya. iscas 2010: 925-928 [doi]
- Integration of Behavioral Synthesis and Floorplanning for Asynchronous Circuits with Bundled-Data ImplementationNaohiro Hamada, Hiroshi Saito. ieicet, 95-C(4):506-515, 2012. [doi]
- A Behavioral Synthesis System for Asynchronous Circuits with Bundled-data ImplementationNaohiro Hamada, Yuki Shiga, Takao Konishi, Hiroshi Saito, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya. ipsj, 2:64-79, 2009. [doi]
- A floorplan method for ASIC designs of asynchronous circuits with bundled-data implementationMinoru Iizuka, Hiroshi Saito. newcas 2013: 1-4 [doi]
- ILP-based Scheduling for Asynchronous Circuits in Bundled-Data ImplementationHiroshi Saito, Nattha Jindapetch, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya. IEEEcit 2006: 172 [doi]