Packet Processing Architecture With Off-Chip LLC Using Interleaved 3D-Stacked DRAM

Tomohiro Korikawa, Akio Kawabata, Fujun He, Eiji Oki. Packet Processing Architecture With Off-Chip LLC Using Interleaved 3D-Stacked DRAM. In 20th IEEE International Conference on High Performance Switching and Routing, HPSR 2019, Xi'an, China, May 26-29, 2019. pages 1-6, IEEE, 2019. [doi]

Abstract

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