Carrier-Scale Packet Processing Architecture Using Interleaved 3D-Stacked DRAM and Its Analysis

Tomohiro Korikawa, Akio Kawabata, Fujun He, Eiji Oki. Carrier-Scale Packet Processing Architecture Using Interleaved 3D-Stacked DRAM and Its Analysis. IEEE Access, 7:75500-75514, 2019. [doi]

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