Martin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann. 15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOS. In 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015. pages 1-3, IEEE, 2015. [doi]
@inproceedings{KramerJDM15, title = {15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOS}, author = {Martin Kramer and Erwin Janssen and Kostas Doris and Boris Murmann}, year = {2015}, doi = {10.1109/ISSCC.2015.7063037}, url = {http://dx.doi.org/10.1109/ISSCC.2015.7063037}, researchr = {https://researchr.org/publication/KramerJDM15}, cites = {0}, citedby = {0}, pages = {1-3}, booktitle = {2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015}, publisher = {IEEE}, isbn = {978-1-4799-6224-2}, }