A novel ultra-fast heuristic for VLSI CAD steiner trees

Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal. A novel ultra-fast heuristic for VLSI CAD steiner trees. In Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003. pages 192-197, ACM, 2003. [doi]

Authors

Bharat Krishna

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C. Y. Roger Chen

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Naresh Sehgal

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