A novel ultra-fast heuristic for VLSI CAD steiner trees

Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal. A novel ultra-fast heuristic for VLSI CAD steiner trees. In Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003. pages 192-197, ACM, 2003. [doi]

@inproceedings{KrishnaCS03,
  title = {A novel ultra-fast heuristic for VLSI CAD steiner trees},
  author = {Bharat Krishna and C. Y. Roger Chen and Naresh Sehgal},
  year = {2003},
  doi = {10.1145/764808.764858},
  url = {http://doi.acm.org/10.1145/764808.764858},
  tags = {C++},
  researchr = {https://researchr.org/publication/KrishnaCS03},
  cites = {0},
  citedby = {0},
  pages = {192-197},
  booktitle = {Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003},
  publisher = {ACM},
  isbn = {1-58113-677-3},
}