A 0.8V V_MIN Ultra-Low Leakage High Density 6T SRAM in 40nm CMOS Technology Using Repeated-Pulse Wordline Suppression Scheme

Ashish Kumar, Mohammad Aftab Alam, Gangaikondan S. Visweswaran. A 0.8V V_MIN Ultra-Low Leakage High Density 6T SRAM in 40nm CMOS Technology Using Repeated-Pulse Wordline Suppression Scheme. In 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems, VLSID 2019, Delhi, India, January 5-9, 2019. pages 547-548, IEEE, 2019. [doi]

@inproceedings{KumarAV19,
  title = {A 0.8V V_MIN Ultra-Low Leakage High Density 6T SRAM in 40nm CMOS Technology Using Repeated-Pulse Wordline Suppression Scheme},
  author = {Ashish Kumar and Mohammad Aftab Alam and Gangaikondan S. Visweswaran},
  year = {2019},
  doi = {10.1109/VLSID.2019.00129},
  url = {https://doi.org/10.1109/VLSID.2019.00129},
  researchr = {https://researchr.org/publication/KumarAV19},
  cites = {0},
  citedby = {0},
  pages = {547-548},
  booktitle = {32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems, VLSID 2019, Delhi, India, January 5-9, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-0409-6},
}