Vinay Kumar, Bhrugurajsinh Chudasama, Bin B. W. Wang, Manish Arora, Bharath Shankaranarayanan. Allocating Physically Aware Embedded Memory Test & Repair Processor using Floorplan Info at the RTL Design Level. In 41st IEEE VLSI Test Symposium, VTS 2023, San Diego, CA, USA, April 24-26, 2023. pages 1-4, IEEE, 2023. [doi]
Abstract is missing.