M. Jagadesh Kumar, Vivek Venkataraman, Susheel Nawal. Analytical Drain Current Model of Nanoscale Strained-Si/SiGe MOSFETs for Analog Circuit Simulation. In 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India. pages 189-194, IEEE Computer Society, 2007. [doi]
Abstract is missing.