Clock-aware placement for large-scale heterogeneous FPGAs

Yun-Chih Kuo, Chau-Chin Huang, Shih-Chun Chen, Chun-Han Chiang, Yao-Wen Chang, Sy-Yen Kuo. Clock-aware placement for large-scale heterogeneous FPGAs. In 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017, Irvine, CA, USA, November 13-16, 2017. pages 519-526, IEEE, 2017. [doi]

@inproceedings{KuoHCCCK17,
  title = {Clock-aware placement for large-scale heterogeneous FPGAs},
  author = {Yun-Chih Kuo and Chau-Chin Huang and Shih-Chun Chen and Chun-Han Chiang and Yao-Wen Chang and Sy-Yen Kuo},
  year = {2017},
  doi = {10.1109/ICCAD.2017.8203821},
  url = {https://doi.org/10.1109/ICCAD.2017.8203821},
  researchr = {https://researchr.org/publication/KuoHCCCK17},
  cites = {0},
  citedby = {0},
  pages = {519-526},
  booktitle = {2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017, Irvine, CA, USA, November 13-16, 2017},
  publisher = {IEEE},
  isbn = {978-1-5386-3093-8},
}