A 2.7 pJ/cycle 16 MHz, 0.7 µW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI

Guenole Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran. A 2.7 pJ/cycle 16 MHz, 0.7 µW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI. J. Solid-State Circuits, 53(7):2088-2100, 2018. [doi]

@article{LallementACDRA18,
  title = {A 2.7 pJ/cycle 16 MHz, 0.7 µW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI},
  author = {Guenole Lallement and Fady Abouzeid and Martin Cochet and Jean-Marc Daveau and Philippe Roche and Jean-Luc Autran},
  year = {2018},
  doi = {10.1109/JSSC.2018.2821167},
  url = {https://doi.org/10.1109/JSSC.2018.2821167},
  researchr = {https://researchr.org/publication/LallementACDRA18},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {53},
  number = {7},
  pages = {2088-2100},
}