Hanho Lee. High-speed VLSI architecture for parallel Reed-Solomon decoder. IEEE Trans. VLSI Syst., 11(2):288-294, 2003. [doi]
@article{Lee03:29,
title = {High-speed VLSI architecture for parallel Reed-Solomon decoder},
author = {Hanho Lee},
year = {2003},
doi = {10.1109/TVLSI.2003.810782},
url = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2003.810782},
tags = {architecture},
researchr = {https://researchr.org/publication/Lee03%3A29},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {11},
number = {2},
pages = {288-294},
}