A power-and-area efficient 10 × 10 Gb/s bootstrap transceiver in 40 nm CMOS for reference-less and lane-independent operation - researchr publication authors

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Joon-Yeong Lee, Kwangseok Han, Taeho Kim, Sangeun Lee, Jeong-Sup Lee, Taehun Yoon, Jinho Park, Hyeon-Min Bae. A power-and-area efficient 10 × 10 Gb/s bootstrap transceiver in 40 nm CMOS for reference-less and lane-independent operation. In 2015 IEEE Custom Integrated Circuits Conference, CICC 2015, San Jose, CA, USA, September 28-30, 2015. pages 1-4, IEEE, 2015. [doi]

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