An energy-delay efficient 2-level data cache architecture for embedded system - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Jongmin Lee, Soontae Kim. An energy-delay efficient 2-level data cache architecture for embedded system. In JÃ¶rg Henkel, Ali Keshavarzi, Naehyuck Chang, Tahir Ghani, editors, Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009. pages 343-346, ACM, 2009. [doi]

This author has not been identified. Look up 'Jongmin Lee' in GoogleThis author has not been identified. Look up 'Soontae Kim' in Google

runs on WebDSL