An energy-delay efficient 2-level data cache architecture for embedded system

Jongmin Lee, Soontae Kim. An energy-delay efficient 2-level data cache architecture for embedded system. In Jörg Henkel, Ali Keshavarzi, Naehyuck Chang, Tahir Ghani, editors, Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009. pages 343-346, ACM, 2009. [doi]

Abstract

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