Won Young Lee, Lee-Sup Kim. A 5.4-Gb/s Clock and Data Recovery Circuit Using Seamless Loop Transition Scheme With Minimal Phase Noise Degradation. IEEE Trans. on Circuits and Systems, 59-I(11):2518-2528, 2012. [doi]
@article{LeeK12-40,
title = {A 5.4-Gb/s Clock and Data Recovery Circuit Using Seamless Loop Transition Scheme With Minimal Phase Noise Degradation},
author = {Won Young Lee and Lee-Sup Kim},
year = {2012},
doi = {10.1109/TCSI.2012.2190678},
url = {http://dx.doi.org/10.1109/TCSI.2012.2190678},
researchr = {https://researchr.org/publication/LeeK12-40},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on Circuits and Systems},
volume = {59-I},
number = {11},
pages = {2518-2528},
}