A 1.2 V 8 Gb 8-Channel 128 GB/s High-Bandwidth Memory (HBM) Stacked DRAM With Effective I/O Test Circuits

Dong Uk Lee, Kyung-whan Kim, Kwan-Weon Kim, Kang Seol Lee, Sang Jin Byeon, Jae-Hwan Kim, Jin-Hee Cho, Jaejin Lee, Jun Hyun Chun. A 1.2 V 8 Gb 8-Channel 128 GB/s High-Bandwidth Memory (HBM) Stacked DRAM With Effective I/O Test Circuits. J. Solid-State Circuits, 50(1):191-203, 2015. [doi]

@article{LeeKKLBKCLC15,
  title = {A 1.2 V 8 Gb 8-Channel 128 GB/s High-Bandwidth Memory (HBM) Stacked DRAM With Effective I/O Test Circuits},
  author = {Dong Uk Lee and Kyung-whan Kim and Kwan-Weon Kim and Kang Seol Lee and Sang Jin Byeon and Jae-Hwan Kim and Jin-Hee Cho and Jaejin Lee and Jun Hyun Chun},
  year = {2015},
  doi = {10.1109/JSSC.2014.2360379},
  url = {http://dx.doi.org/10.1109/JSSC.2014.2360379},
  researchr = {https://researchr.org/publication/LeeKKLBKCLC15},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {50},
  number = {1},
  pages = {191-203},
}