A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Tsung-Sum Lee, Chi-Chang Lu, Shen-Hau Yu, Jian-Ting Zhan. A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 3111-3114, IEEE, 2005. [doi]

This author has not been identified. Look up 'Tsung-Sum Lee' in GoogleThis author has not been identified. Look up 'Chi-Chang Lu' in GoogleThis author has not been identified. Look up 'Shen-Hau Yu' in GoogleThis author has not been identified. Look up 'Jian-Ting Zhan' in Google

runs on WebDSL