A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal

Tsung-Sum Lee, Chi-Chang Lu, Shen-Hau Yu, Jian-Ting Zhan. A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 3111-3114, IEEE, 2005. [doi]

Abstract

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