Tsung-Sum Lee, Chi-Chang Lu, Shen-Hau Yu, Jian-Ting Zhan. A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 3111-3114, IEEE, 2005. [doi]
@inproceedings{LeeLYZ05:0,
title = {A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal},
author = {Tsung-Sum Lee and Chi-Chang Lu and Shen-Hau Yu and Jian-Ting Zhan},
year = {2005},
doi = {10.1109/ISCAS.2005.1465286},
url = {http://dx.doi.org/10.1109/ISCAS.2005.1465286},
researchr = {https://researchr.org/publication/LeeLYZ05%3A0},
cites = {0},
citedby = {0},
pages = {3111-3114},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
publisher = {IEEE},
}