Jae-Jin Lee, Gi-Yong Song. Bit-level super-systolic array for FIR filter with a FPGA-based bit-serial semi-systolic multiplier. In Russell Tessier, Herman Schmit, editors, Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004. pages 249, ACM, 2004. [doi]
Abstract is missing.