Combination Of Automatic Test Pattern Generation And Built-In Intermediate Voltage Sensing For Detecting CMOS Bridging Faults

Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang, Cheng-Liang Tsai. Combination Of Automatic Test Pattern Generation And Built-In Intermediate Voltage Sensing For Detecting CMOS Bridging Faults. In 5th Asian Test Symposium (ATS 96), November 20-22, 1996, Hsinchu, Taiwan. pages 100, IEEE Computer Society, 1996. [doi]

Authors

Kuen-Jong Lee

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Jing-Jou Tang

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Tsung-Chu Huang

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Cheng-Liang Tsai

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